1. Field of the Invention
The field of the invention is data processing, or, more specifically, methods, systems, and products for operating Peripheral Component Interconnect (‘PCI’) Express resources in a logically partitioned computing system.
2. Description of Related Art
The development of the EDVAC computer system of 1948 is often cited as the beginning of the computer era. Since that time, computer systems have evolved into extremely complicated devices. Today's computers are much more sophisticated than early systems such as the EDVAC. Computer systems typically include a combination of hardware and software components, application programs, operating systems, processors, buses, memory, input/output devices, and so on. As advances in semiconductor processing and computer architecture push the performance of the computer higher and higher, more sophisticated computer software has evolved to take advantage of the higher performance of the hardware, resulting in computer systems today that are much more powerful than just a few years ago.
One area in which computer software has evolved to take advantage of high performance hardware is a software tool referred to as a ‘hypervisor.’ A hypervisor is a layer of system software that runs on the computer hardware beneath the operating system layer to allow multiple operating systems to run on a host computer at the same time. Hypervisors were originally developed in the early 1970's, when company cost reductions were forcing multiple scattered departmental computers to be consolidated into a single, larger computer—the mainframe—that would serve multiple departments. By running multiple operating systems simultaneously, the hypervisor brought a measure of robustness and stability to the system. Even if one operating system crashed, the others would continue working without interruption. Indeed, this even allowed beta or experimental versions of the operating system to be deployed and debugged without jeopardizing the stable main production system and without requiring costly second and third systems for developers to work on.
A hypervisor allows multiple operating systems to run on a host computer at the same time by providing each operating system with its own set of computer resources. These computer resources are typically virtualized counterparts to the physical resources of a computing system. A hypervisor allocates these resources to each operating system using logical partitions. A logical partition is a set of data structures and services that enables distribution of computer resources within a single computer to make the computer function as if it were two or more independent computers. Using a logical partition, therefore, a hypervisor provides a layer of abstraction between a computer hardware layer of a computing system and an operating system layer.
In addition to the software layer, innovations in the computer hardware layer have also occurred in the subsystem that transfers data between components inside a computing system. Older data transfer subsystems included a computer bus that logically connect several components over the same set of wires and transfer data among components in parallel. Older data transfer subsystems included, for example, computer buses implemented according to the Peripheral Component Interconnect (‘PCI’) or PCI-eXtended (‘PCI-X’) specifications promulgated by the PCI Special Interest Group (‘PCI SIG’). Newer data transfer subsystems include a point-to-point connection between components that serves as a link for transmitting data serially. One implementation of such a data transfer subsystem includes a data transfer subsystem implemented according to the set of PCI Express (‘PCIe’) specifications promulgated by the PCI Special Interest Group (‘PCI SIG’).
A PCI Express data transfer subsystem uses existing PCI programming and software concepts, but is based on a different and much faster serial physical-layer communications protocol. The physical-layer consists not of a bus, but of a network of serial interconnections extending to each PCI Express adapter from a PCI Express root complex. The PCI Express root complex is a computer hardware chipset that handles communications between the components of a computer system such as, for example, a computer processor, RAM, non-volatile memory, power management components, the real-time system clock, PCI Express adapters, and so on. The PCI Express root complex includes a host bridge for communicating with one or more computer processors. The PCI Express root complex also includes a number of ports that each provides data communication with a port on a PCI Express device such as, for example, a PCI Express switch or PCI Express adapter.
A connection between any two PCI Express ports is referred to as a ‘link.’ A link consists of a collection of one or more lanes used for data communications between PCI Express devices. Each lane is a set of two unidirectional low voltage differential signaling pairs of transmission pathways such as, for example, traces along a motherboard. Because transmitting data and receiving data are implemented using separate differential pairs, each lane allows for full-duplex serial data communication of up to five gigabits of data per second with the potential for increased bandwidth as technology in the physical layer advances. The ability to combine several lanes together to form a link allows PCI Express technology to provide scalable bandwidth.
The increased performance offered by computing systems designed using PCI Express technology is readily apparent given the scalable, high-bandwidth capability afforded by PCI Express. As PCI Express becomes the data transfer subsystem implementation preferred by computer architects, more and more computing systems will take advantage of the increased performance offered by PCI Express, including logically partition computing systems. Readers will therefore appreciate that there is an ongoing need for improvement in the area of operating PCI Express resources in a logically partitioned computing system.